A data processor requires a variety of shift operations to implement its instruction set. The shift operations can include left shifts, right shifts, and rotates. The shifts can be arithmetic or logical, which determines how bits at either end of the operand are handled. Each shift or rotate operation has a variable length. Which bit is shifted into a given bit position is determined by the type of shift operation. There is a tradeoff involved in designing circuitry to implement shift and rotate operations on an operand. The area on the integrated circuit used for the circuitry to perform the operations affects the performance of the operation, measured in number of clock cycles to complete the operation.
At one extreme, a barrel shifter performs a full matrix of operations on an operand. For example, if the barrel shifter is 32 bits wide, each of the 32 bits is selectively coupled directly to each of the other 31 bits. Which bits are coupled together for an operation is determined by the length and direction of the operation being performed. The barrel shifter maximizes the performance of the shifter, but also consumes a maximum of space. At the other extreme, a simple shifter shifts only one bit at a time. To implement shifts of larger lengths, a control section must use consecutive one-bit shift operations until the specified length is reached. This type of shifter uses much less area than the barrel shifter, but performance is greatly diminished. How to optimize the chip area-performance tradeoff is a significant problem in data processor design. Another problem is that when the operand size of the data processor is increased or decreased, the shifter redesign may be quite complicated.
Another use of chip area occurs in the implementation of certain instructions. An example is the move multiple registers (MOVEM) instruction. Data processors receive instructions from software to do certain functions, and the instructions are often contained in two or more 16-bit words. In the MOVEM instruction, the first word is an operation code (opcode), which indicates the type of instruction, and the second word is a mask, which indicates which registers are affected. In the second word of a MOVEM instruction, a `1` in a bit position in the mask word indicates that the move instruction is to be carried out on a register which corresponds to that bit position. To implement an instruction with such a mask, special hardware circuitry is usually required to take the mask word and generate select signals at the appropriate time. Special circuitry for implementing the MOVEM instruction, therefore, also requires chip area.